Sistema de acceso a puertos generales de entrada y salida a distancia para una FPGA orientado a prácticas universitarias
This project is about the development of an embedded system linked to an FPGA development kit Altera DE2. The embedded system allows to access to the expansion ports remotely and has an interface (LCD and pushbuttons) for configuring the number of pins according to the FPGA, and the user can realize...
| Autor Principal: | Albán Conde, Jorge Eduardo |
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| Otros Autores: | Balanta Zamora, Juan camilo |
| Formato: | info:eu-repo/semantics/bachelorThesis |
| Idioma: | spa |
| Publicado: |
Universidad de San Buenaventura - Cali
2017
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| Materias: | |
| Acceso en línea: |
http://hdl.handle.net/10819/4646 |
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| Sumario: |
This project is about the development of an embedded system linked to an FPGA development kit Altera DE2. The embedded system allows to access to the expansion ports remotely and has an interface (LCD and pushbuttons) for configuring the number of pins according to the FPGA, and the user can realize practices of combinatory circuits like if was in the laboratory. The designed system uses Remote Desktop Protocol for communicating two computers, and it consists of two devices where each is connected to a computer through the USB port. To the first device, the user has physical access and can configure its 36 pins like input or output, for different implement designs of digital circuits locally. The second device is on a remote computer, and it is linked to the expansion port of the FPGA. Both devices multiplex and demultiplex the pins information for send or receive through the USB port. The results were evaluated with unidirectionality and bidirectionality tests, implementing a system where the variable’s changes in the user circuit were showed in the FPGA, and vice versa. Additionally, with a survey for electronic engineering students between 5° and 10° semesters, the questions evaluated different criteria (pedagogical, technical and economic), this allow us to know the acceptability of the system by students. The answers are encouraging, demonstrating that the system presented gives a solution to the lack of availability of FPGA in the laboratory. |
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